Tuesday, September 1, 2009

Tile or Region Based Rendering

Another mini-tutorial in the series aimed at bringing DTV experts up to speed on graphics.

PowerVR, used in i-phones is a tile based rendering 3d pipeline. Broadcom, who acquired Stellar Semi-conductors back in the year 2000 invested in the PixelSquirt architecture and are still using a variant of it today. This is also a form of tile or region based rendering.

So what is it and why is it useful for set top boxes and mobile devices?

A normal graphics pipeline performs the following:

for each triangle
  • transform it and light it
  • project to 2d
  • clip it to the window
for each pixel in the triangle
  • check visibility (usually done with z-buffer hardware) and if its visible
  • interpolate lighting
  • fetch textures to draw on it
  • write the pixel with alpha blending if necessary

A region based architecture adds an extra stage by dividing the screen into regions which may be tiles of pixels or may even be scan lines or a number of scan lines.

The extra stage then becomes:
for each triangle
  • transform it and light it
  • project to 2d
  • clip it to the window
  • determine which regions the triangle enters and cache a reference
Now for each region each pixel of each triangle is processed as before. There are variations and optimisations on this scheme but this is the basic idea.

This seems to add more complexity. Obviously, cache memory for the triangles is needed or the triangles must be sent many time to the pipeline and each time clipped to the regions. This seems wasteful.

However, tile based rendering has major benefits:
  1. A z-buffer need only be the size of a tile, vastly cutting down the required on chip memory and saving cost at the IP level.
  2. Tile based rendering increases cache coherence for texture fetches and , of course, z-buffer references and this cuts bandwidth to main memory
  3. Power use is cut down due to simpler 1 and 2 above
  4. Performance can increase over traditional architectures because of cache coherence.
A recent study showed that tile based architectures can cut memory bandwidth by nearly 2x over traditional architectures.

In set tops, 3D IP is costly as it is not a base function of the device. Even 5$ added to the BOM of an STB is too much. Smaller IP is better IP. Power consumption is not as much of an issue as in mobile devices however, and so some of the advantages of tile based chips such as PowerVR are not relevant. This leaves us with the advantage that greater performance can be achieved in the pixel drawing part of the pipeline. However here, the depth complexity (how many polygons overlap) in an average user interface must be quite low (an average of 2.0 say). Therefore the extra work a tile based renderer must do to bin the polygons, or send them many times, may outweigh the benefits.

One last point. Tiles need a cache. When screens are small the number of caches is small but when screen reach full HD resolution there are a large number of caches for the triangles. A tile needs to be around 32x32 pixels in size so for full HD we need 240 caches - a considerable number.

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